CDGS CD-ROM Controller Registers

The CDGS chip (sometimes "CDTV-CR" or "Amiga CD-ROM controller") is the CD-ROM drive controller on the Amiga CDTV and the external A570 CD-ROM drive for A500/A500+/A600/A1200. The chip is accessed via a base address of $B80000.

This page documents the register map of the CDGS chip as known from public Amiga hardware documentation. The companion CDTV-CR bridge chip is documented separately in cdtv-cr.md.

Register map (offsets from $B80000)

All registers 8-bit unless noted. Many are LONG-aligned (4-byte accesses).

Offset Absolute Name Access Width Description
$0000 $B80000 CDCHIPVERSION R LONG Revision / chip version register
$0004 $B80004 CDSTATUS R LONG Interrupt status register
$0008 $B80008 CDINT2ENABLE RW LONG Int 2 interrupt enable register
$0010 $B80010 CDROMHIGH RW LONG CD-ROM data high DMA address bits
$0014 $B80014 CDCOMHIGH RW LONG Drive communications data high address
$0018 $B80018 CDSUBINX RW BYTE Drive subcode page index
$0019 $B80019 CDCOMTXINX RW BYTE Drive comms receive page index
$001A $B8001A CDCOMRXINX RW BYTE Drive comms transmit page index
$001D $B8001D CDCOMTXCMP RW BYTE Drive comms transmit compare register
$001F $B8001F CDCOMRXCMP RW BYTE Drive comms receive compare register
$0020 $B80020 CDPBX RW LONG Bits identifying used/unused buffers
$0024 $B80024 CDCONFIG RW LONG Drive configuration
$0028 $B80028 CDCOMPORT W BYTE Write a command byte to the drive
$002C $B8002C CDPORTDAT RW BYTE Twiddle the bits, or read the bits
$002E $B8002E CDPORTDIR RW BYTE Port direction

Interrupt bits (CDSTATUS register)

Bit Define Meaning
31 INTB_SUBCODE / INTF_SUBCODE Frame interrupt
30 INTB_DRIVEXMIT / INTF_DRIVEXMIT Drive command transmit
29 INTB_DRIVERECV / INTF_DRIVERECV Drive command receive
28 INTB_RXDMADONE / INTF_RXDMADONE Receive DMA complete
27 INTB_TXDMADONE / INTF_TXDMADONE Transmit DMA complete
26 INTB_PBX / INTF_PBX CD-ROM data available
25 INTB_OVERFLOW / INTF_OVERFLOW No free buffers available

Configuration register bits (CDCONFIG)

Bit Define Meaning
31 CB_SUBCODE / CF_SUBCODE Subcode DMA enable
30 CB_CDCOMTX / CF_CDCOMTX Drive comms transmit enable
29 CB_CDCOMRX / CF_CDCOMRX Drive comms receive enable
28 CB_DBLCAS / CF_DBLCAS Double CAS enable
27 CB_PBX / CF_PBX PBX enable
26 CB_CDROM / CF_CDROM CDROM data path enable
25 CB_DATA / CF_DATA RAW data mode enable
24 CB_2500Q / CF_2500Q 2500Q mode
23 CB_PALNTSC / CF_PALNTSC PAL/NTSC config

Audio mute (via CIAA)

The CD audio path is muted by setting bit 0 of CIAA port A (the audio right channel of CIAA PRA). The standard CIAA address and bit definitions apply:

Address Name Bit Mask
$BFE001 CIAAPRA MUTEB = 0 MUTEF = $01

This is not a CDGS register — it's the standard CIAA PRA register at $BFE001. See ../register-reference.md for the full CIA register table.

Limitations

The Akiko controller (the CD32's chip) is not documented here — it was introduced after the CDTV era and uses a different register layout.

Cross-references