BPLCON1¶
| Address | Name | Description |
|---|---|---|
| DFF102 | BPLCON1 | Bit Plane Control Register (horizontal, scroll counter) |
Overview¶
| Bit | Function | Description |
|---|---|---|
| 15 | PF2H7 | (PF2Hx =) Playfield 2 horizontal scroll code, x=0-7 |
| 14 | PF2H6 | |
| 13 | PF2H1 | |
| 12 | PF2H0 | |
| 11 | PF1H7 | (PF1Hx =) Playfield 1 horizontal scroll code, x=0-7 where PFyH0 = LSB = 35ns SHRES pixel (bits have been renamed, old PFyH0 now PFyH2, etc). Now that the scroll range has been quadrupled to allow for wider (32 or 64 bits) bitplanes. |
| 10 | PF1H6 | |
| 09 | PF1H1 | |
| 08 | PF1H0 | |
| 07 | PF2H5 | OCS/ECS |
| 06 | PF2H4 | " |
| 05 | PF2H3 | " |
| 04 | PF2H2 | " |
| 03 | PF1H5 | " |
| 02 | PF1H4 | " |
| 01 | PF1H3 | " |
| 00 | PF1H2 | " |
page revision: 2, last edited: 05 Feb 2011 13:08
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